Many EEPROMs which are known at present use memory cells which store electric charges in a charge storage layer (such as a floating gate electrode). In NAND flash memories, which are an example of such EEPROMs, data rewrite using an FN tunnel current for both write and erase operations is performed. In recent years, multilevel storage technique of storing data of two or more bits in a memory cell has been introduced, and it has become possible to increase the storage capacity twice or more with the physically same cell size.
To improve the reliability of data reading, writing should be performed to set the threshold voltage distribution as narrow as possible. This case requires, however, a fine verify operation, and increases the write time. Although a margin between threshold voltage distributions may be increased by increasing a threshold voltage of each data, it is necessary to increase a write pass voltage and a read pass voltage of non-selected memory cells, since the highest threshold voltage distribution is raised to the high voltage side in this case. This structure increases stress on memory cells.